John Conway tribute project (FPGA full HD GoL)

For general discussion about Conway's Game of Life.
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hrvach
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Joined: April 27th, 2020, 10:20 am

John Conway tribute project (FPGA full HD GoL)

Post by hrvach » April 27th, 2020, 10:24 am

Dear all,

I'm new to the forum and would like to say hi to everyone. Learning that John Conway passed away made me think of creating something as a tribute.

It's a FPGA implementation of Game of Life running 1080p at 60 fps and showcasing some of the patterns that were no doubt created by some of you wizards.

Hope you will find it interesting -> https://www.youtube.com/watch?v=KaBm4etcYFQ

Cheers!

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pcallahan
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Joined: April 26th, 2013, 1:04 pm

Re: John Conway tribute project (FPGA full HD GoL)

Post by pcallahan » April 27th, 2020, 12:30 pm

Do you have more information on the FPGA? I think the implementation itself is the interesting part here rather than raw speed. High speeds can be attained using algorithms like HashLife rather than optimizing the speed of calculating individual cell transitions.

Is this a sparse implementation, i.e. only working with live cells, or does it calculate the whole grid? There is no way to tell from the video.

hrvach
Posts: 2
Joined: April 27th, 2020, 10:20 am

Re: John Conway tribute project (FPGA full HD GoL)

Post by hrvach » April 27th, 2020, 12:36 pm

It is just a for-fun and tribute project, wasn't aiming for high speed as 1080p @ 60 is still the ceiling with most monitors nowadays. It is an *as simple as it goes* implementation that calculates the entire grid.

I know people here have much more background on GoL and implementations so this may look naive (which it is) but I though you guys might enjoy it nevertheless :)

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pcallahan
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Re: John Conway tribute project (FPGA full HD GoL)

Post by pcallahan » April 27th, 2020, 1:54 pm

hrvach wrote:
April 27th, 2020, 12:36 pm
It is just a for-fun and tribute project, wasn't aiming for high speed as 1080p @ 60 is still the ceiling with most monitors nowadays. It is an *as simple as it goes* implementation that calculates the entire grid.

I know people here have much more background on GoL and implementations so this may look naive (which it is) but I though you guys might enjoy it nevertheless :)
I think it's a cool idea. Is there any way to illustrate in the video (or some followup) that it is actually being done in FPGAs?

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